FORM FACTOR
The most common substrate form factors for fabrication processes, and equipment automation are based on wafer, mask,
display, and optical storage standards.
Sources for standards are; www.semi.org
FLATNESS
Smaller Ga As and LED wafers typically have the worst flatness, and the larger advanced Si lithography wafers have the best.
Descriptor Length scale Height
Across wafer 50 - 200 mm up to 20 um
Across field 10 - 25 mm 100 nm – 1 um
Nanotopography 2-3 mm 50 – 100 nm
Roughness < 1 um < 1 nm
Devices 100 nm – 200 um 10 nm - 2 um
The imprint tool must adapt (conform) to the large across wafer variation, either by S&R of a small field mold mounted on a
flexure, or by bending the wafer or mold.
Litho grade wafers are specified by “site flatness” or the across filed variation based on a standard stepper field. The across
field variation must be less than the depth of field (DOF) of the lens, for the latest lenses, the DOF is approximately the
resolution of the lens. For imprinting sub 100 nm features, the size of the imprint field must be matched to the length scale of
regions flat to < 100 nm.
Nanotopography will cause imprints with visible color variations. It can be managed by imprint planarization such as SFIl/R
or by conformality such as bending the template or wafer, or by selecting double polished wafers as shown below.
Device structures must be planarized.
Surface roughness can be ignored, unless you want to transfer imprint molecular layers.
More on Nanotopography - An interferogram of a single sided polished (SSP) and a double sided polished (DSP) wafer are
shown below. The single side polished wafer has a peak to peak range of 100 nm at a spatial length of 2-3 mm. This results
in residual layer variation that requires some form of imprint planarization for imprint features < 400 nm. Spin on planarization
cannot affect variations with a spatial length of > 50 um. MII has used an SFIL-R process to show 50 nm patterning on SSP
wafers.
DSP wafers are almost perfectly flat within the field as shown in interferogram below with no fringes.
Conformality can also be used to correct for nanotopography. This has been demonstrated in CMP with soft pads behind the
reference polishing surface, as shown below with reduced % thickness variation in polished layers.
CLEANLINESS
Wafers with front side particles < 10’s of 0.25 um particles make satisfactory low pressure nano-imprint substrates.
The backside of wafers does not need to be as clean as the front, however visible contamination must be avoided.
Suitable process cleanliness can be achieved using a Class 100 environment or even a Class 1000 environment with mini-
environments around all process equipment, and good process discipline.
Substrates can be qualified by “eyeball” inspection under a off axis intense light such as a projector or fiber light, that will
probably detect sub 10 um particles.
For more on substrate cleaning go to Clean
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